Microprocessors(MODULE 2)

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Module 2

Instruction set, Classification of instructions – Data transfer, Arithmetic and Logic instructions, Program control instructions, Simple programs in 8086 Assembly language.

IBM PC Assembly Language Programming, Program Development Tools – DEBUG, MASM, TASM etc.

Lecture #1           

1.      Synopsis

·         Instruction set of 8086

·         Data Transfer Instructions    

2. Target

      By this lecture, you should be able to answer the following questions

a)      What are the different instruction types of 8086?

b)      How does the CPU identify between 8-bit and 16-bit operations?

c)      Explain the address loading instructions?

 3. Introduction

      8086 programming is the basis for programming the 80X86 series of processors. An 8086 instruction consists of one to six bytes, plus an optional segment override byte. The first byte in every instruction is the opcode byte, which specifies the operation to be performed. If data is to be handled, the second byte is an addressing byte. If a displacement or other data is required, it is contained in the following bytes.

In the opcode of a data-transfer instruction, bit 0 is usually the "size" bit w. w = 0 makes a byte (8-bit) operation, and w = 1 makes a word (16-bit) operation. Bit 1 is the "direction" bit d. This specifies which reference in the addressing byte is the source, and which the destination, of data. Opcodes that do not manipulate data do not have d or w bits.

  4. Revision/Prerequisites

      Please refer to the text Microprocesor architecture of Remesh Gaonkar-Fifth Edition and the pages 40-45 of Advanced microprocessors and peripherals, A K Ray & K M Chaudhari.

   5. Concepts

Instruction format

      All instructions vary in size from one byte up to fourteen bytes. But all have the same six-part structure. Understanding the purpose of each part is the first step to learning the sizes of the different Intel instructions. The parts of an Intel-format instruction are listed below, in the order that they appear in the instruction:

o    Prefixes: 0-4 bytes

o    Opcode: 1-2 bytes

o    ModR/M: 1 byte

o    SIB: 1 byte

o    Displacement: 1 byte or word

o    Immediate: 1 byte or word

The 16 bit mode 8086 instruction have the following format.

OPCODE

D

W

MOD

REG

R/M

DISP

IMMEDIATE

Except for the opcode, all of these parts are optional. They are only present when the particular instruction requires them. Simple instructions such as NOP require just the opcode. Complicated instructions, such as ADD [ES: my_data+EBX+ESI*8], WORD 1003H, require all of the fields.

Prefixes

The optional prefixes are the first part of an Intel instruction. These prefixes modify the instruction's behavior in several different ways. Prefixes can change the default segment of an instruction, override the default size of the machine-word, control looping in string instructions, and control the processor’s bus usage. Each prefix adds one byte to the instruction. An instruction can have one prefix from each of the four prefix groups, for a maximum of four prefix bytes:

o    Group 1: LOCK, REPE/REPZ, REP, REPNE/REPNZ

o    Group 2: CS, DS, ES, FS, GS, SS, Branch hints

o    Group 3: Operand-size override (16 bit vs. 32 bit)

o    Group 4: Address-size override (16 bit vs. 32 bit)

Opcode

The operation code, or opcode, comes after any optional prefixes. The opcode tells the processor which instruction to execute. In addition, opcode contain bit fields describing the size and type of operands to expect. The NOT instruction, for example, has the opcode 1111011w. In this opcode, the w bit determines whether the operand is a byte or a word. The OR instruction has the opcode 000010dw. In this opcode, the d bit determines which operands are the source and destination, and the w bit determines the size again.

Not all opcode are the same size. The original instructions from the 8088 have one-byte opcode, while new instructions since the 386 generally have two-byte opcode. Some SSE instructions even have three-byte opcode. This is because the size of a byte limits the number of possible opcode. As Intel runs out of unused opcode, the only way to add more instructions is to give them opcodes larger than one byte.

ModR/M

If the instruction requires it, the ModR/M byte comes after the opcode. This byte tells the processor which registers or memory locations to use as the instruction’s operands. The byte has the following structure:

Both the reg1 and reg2 fields take three-bit register codes, indicating which registers to use as the instruction's operands. By default, reg1 is the source operand and reg2 is the destination. Some opcodes, such as the OR opcode mentioned above, contain a direction bit which overrides this default. Other instructions require a single operand. If an instruction requires only one operand, the unused reg2 field holds extra opcode bits rather than a register code

The mod field determines the meaning of the reg1 field. The meaning of reg1 field becomes more complicated in 16-bit mode. When mod specifies a memory address (mod = 00, 01, or 10), reg1 does not contain a simple register code.

Register assignments for REG field and R/M field

Code	W=0 Byte	W=1 Word
001 001 010 011 100 101 110 111	AL CL DL BL AH CH DH BH	AX CX DX BX SP BP SI DI

     

R/M Memory addressing

R/M Code	Addressing mode
000 001 010 011 100 101 110 111	DS:[BX+SI] DS:[BX+DI] SS:[BP+SI] SS:[BP+DI] DS:[SI] DS:[DI] SS:[BP] SS:[BX]

Examples of binary code for instructions

a)      MOV  AX, BX 

Here Opcode MOV has 100010 as binary code.

D=1 ; Destination is Register AX.

W=1 ; Width of data transfer is 16 bit.

MOD=11 ; Register addressing mode

REG=001;

R/M=011;

Hence binary code 1000101111001011

b)      MOV AX, [3241H]

Here D=1 W=1 MOD=00 REG=001 DISP=01000001 00110010

Hence binary code 1000101100001      01000001 00110010

 General Format of instructions

      There are six general formats of instructions in 8086. The length of an instruction may vary from one to six bytes.

1.      One byte instruction

This format is only one byte long and may have the implied data or register operands. The least significant three bits of the opcode are used for specifying the register opernd, if any. Otherwise all the eight bits form an opcode and the operands are implied.

2.      Register to register

Trhe format is two byte long. The first byte of the code specifies the operation code and width of the operand by W bit. The second byte of the code shows the register operands and R/M field.

Opcode

W

11

REG

R/M

The register represented by REG field is one of the operands. The R/M field specifies the other operand field, register or memory location.

3.      Register to/from memory with no displacement

This format is also two bytes long and similar to Reg to Reg except for MOD field.

Here MOD field is 00.

4.      Register to/from memory with  displacement

                  This format contains one or two additional bytes for displacement along with two bytes of the previous format.

opcode

MOD

REG

R/M

Lower Byte Of Displacement

Higher Byte Of Displacement

5.      Immediate operand to register

            In this format, the first byte as well as the three bits from the second byte is also used for opcode. It also contains one or two bytes of immediate data.

D7             D0 D7 D6D5      D3 D2D1    D7                     D0 D7                      D0

opcode

11

opcode

R/M

Lower Byte data

Higher byte data

6.      Immediate operand to memory with 16-bit displacement

            This type of instruction format requires five or six bytes for coding. The first two bytes contain information regarding Opcode, Mode and R/m fields. The remaining four bytes contain two bytes of displacement and two bytes of data as shown below.

Opcode

MOD

REG

R/M

Lower byte of displacement

Higher byte of displacement

Lower byte of data

Higher byte of Data

      Instruction set

                  The 8086 instructions are categorized into the following types. Here we see the function of each instruction with example.

1)      Data Copy/Transfer Instructions

2)      Arithmetic and Logical Instructions

3)      Branch Instructions

4)      Loop instructions

5)      Machine control Instructions

6)      Flag Manipulation Instructions

7)      Shift and Rotate Instructions

8)      String Instructions

Data Copy/Transfer Instructions

      This type of instructions are used to transfer data from source operand to destination operand. Following instructions belong to this category.

i)        MOV

      These instructions all have the mnemonic MOV, for "move", although the actual action is to copy a byte or a word from one place to another. The data is unchanged at the source, but overwrites whatever was previously at the destination.

                  This data transfer instruction transfers data from one register/memory location to another register/memory location. The source and destination may be a register or a memory location.

      However, in case of immediate addressing mode, a segment register cannot be a destination register. To load the segment registers with immediate data, one will have to load any general-purpose register with the data and then it will have to be moved to that particular segment register.

Eg: i) MOV AX, 5000H

ii)      MOV AX, BX

iii)    MOV AX, [SI]

iv)    MOV AX, [6000H]

v)      MOV AX, 50H[BX]

vi)    MOV DS, 5000H          (Not permitted)

            MOV AX, 5000H

            MOV DS, AX

ii) Stack Instructions

The stack is temporary storage originally used to preserve return addresses when a subroutine is called. It is so convenient for temporary storage that it is used as the location of temporary or automatic variables for the use of subroutines. The top of the stack is at SS:SP, which is really the bottom, since the stack builds downwards, towards smaller offsets. It is very important that everything one pushes on the stack is later removed, so that the stack does not grow out of bounds and trash memory. Data may be overwritten on the stack, but it is not erased.

a) PUSH: Push to Stack

            This instruction pushes the contents of the specified register/memory location onto the stack. The stack pointer is decremented by two, after each execution of the instruction. The actual current stack-top is always occupied by the previously pushed data. Hence, the push operation decrements SP by two and then stores the two byte contents of the operand onto the stack. The higher byte is pushed first and then the lower byte.

Eg: PUSH AX

PUSH DS

PUSH [5000H]     ; Content of location 5000H and 5001H in DS are pushed onto stack.

b) POP: Pop from stack

            POP AX, loads the low byte in the register, increments SP, loads the high byte, and increments SP again. I.e. it loads the specified register /Memory location with the contents of the memory location. The stack pointer is incremented by two. A PUSH followed by a POP restores the stack to its original state. The SP can be moved to BP, and then data can be accessed at SS:BP, since the default segment for BP is SS. This is how a subroutine accesses its automatic variables.

Eg: POP AX

      POP DS

      POP [5000H]

c)      PUSHF: Push flags to stack

                  PUSHF pushes the flag register onto the satck; first upper byte and then the lower byte will be pushed onto stack. The SP will be decremented by two for each push operation.

            d) POPF: Pop Flags from Stack

                        The POPF instruction loads the flag register completely from the word contents of the memory location currently addressed by SP and SS. The SP is incremented by two for each POP operation.

      iii) Input/Output Instructions

The 8086 provide an additional 64K address space with distinct control signals. Only two instructions, IN and OUT activate these control signals. The 16-bit I/O address or port is loaded into the DX register.

a)      IN: Input the port

This instruction is used for reading an input port. The address of the input port may be specified in the instruction directly or indirectly. DX is the only register allowed to carry the port address. The instruction IN AL, DX (EC) reads a byte from the address in DX, while IN AX, DX (ED) reads two successive bytes from DX and DX + 1.

Eg: IN AL, 0300H   ; Reads data from an 8 bit port whose address is 0300H & stores t in AL.

      IN AX                ; Reads data from 16-bit port whose address is DX & stores it in AX.

b)      OUT: Output the to the port

This instruction is used for writing to an output port. The address of the input port may be specified in the instruction directly or implicitly in DX. The registers AL and AX are the allowed source addressed operands for 8-bit and 16-bit operations respectively.

OUT DX, AL (EE) and OUT DX, AX (EF) writes a byte or a word, respectively, to DX.

Eg: OUT 0300H   ;This sends data available in AL to a port whose address is 0300H

OUT AX    ; Sends data available in AX to a port whose address is specified implicitly in DX

If the I/O address is in the range 00-FF, IN AL, port (E4), IN AX, port (E5), OUT port, AL (E6) and OUT port, AX (E7). Each opcode is followed by a byte specifying the I/O address or port number.

Address Loading Instructions

            We have seen that we can use an offset loaded in BX to access data. However, the offset of a location in memory is often expressed as the sum of several contributions, such as BX + SI + DISP. This offset is called the effective address, EA.

a)LEA: Load Effective Address

   The instruction LEA loads the offset in of an operand in the specified register.

 For example, LEA BX, [BX + SI + DISP]

Note that memory is not involved in this, just address arithmetic.

b) LDS/LES: Load Pointer to DS/ES

               Sometimes the address of data is in memory as offset and segment. To access the data, we must load DS as well as the offset. The instruction LDS will do this. An exactly similar instruction loads ES and the offset. In string operations, we often have to load DS:SI and ES:DI for the source and destination of the string, and LDS, LES do this efficiently, loading the necessary segments as well. When using these instructions, remember that the segment registers are changed, and may have to be restored. As we have seen, they may be pushed on the stack and restored after the string movement has been accomplished.

Thus this instruction loads the DS or ES register and the specified destination register in the instruction with the content of memory location specified as source in the instruction.

Eg: LDS/LES BX, [5000H] 

c)LAHF: Load AH from Lower Byte Of Flag

This instruction loads the AH register with the lower byte of the flag register. This instruction can be used to observe the status of all the condition code flags at a time.

d)     SAHF: Store AH from Lower Byte Of Flag

This instruction sets or resets the condition code flags in the lower byte of the flag register depending upon the corresponding bit positions in AH.

  6. Summary

        Today we have discussed various data transfer instructions including input/output, address loading and stack operations. Tomorrow we will study Arithmetic and logic instructions.

7. Exercise Questions

1.      The instruction that loads the both segment register and offset is?

a. LDS             b. LES             c. LEA                        d. Both a and b.

2.       IN AX instruction will?

a.       Read 16 bit data to AX   

b.      Read data from 16-bit port to AX

c.       Read from AX to the port

3.      Which of the following is false statement about PUSHF?

a.        First upper byte and then the lower byte will be pushed onto stack.

b.       The SP will be decremented by two for each push

c.       Push the content of the DS register into stack

4.      Which base register data in stack?

a.       Data segment

b.      Stack segment

c.       Extra segment

 

Lecture #2

1.      Synopsis

·         Arithmetic instructions

·         Compare Instruction

2. Target

      By this lecture, you should be able to answer the following questions

a)      Explain the difference between SUB and CMP instruction?

b) Which instructions are used with ASCII arithmetic operations?

c) Is it possible to add CX to DS with the ADD instruction?

3. Introduction

There are special instructions in 8086 for arithmetic instructions. These instructions usually perform the arithmetic operations, like addition, subtraction, multiplication and division along with the respective ASCII and decimal adjust instructions. This include ADD instructions that add immediate data to the accumulator, add immediate data to a register or memory location, and the general case of adding register-to-register, memory to register and register to memory. There are three parallel ADC instructions that also add in the carry flag. To perform a multiple-precision add, one starts with ADC and then adds higher-order words or bytes with ADC.

  4. Revision/Prerequisites

      Please refer to the text Microprocessor architecture of Remesh Gaonkar-Fifth Edition and of Advanced microprocessors and peripherals, A K Ray & K M Chaudhari.

5. Concepts

 ADD: Add

            This instruction adds an immediate data or contents of a memory location specified in the instruction or a register to the contents of another register or memory location. All the condition code flags are affected by this instruction. But the memory-to-memory addition is not possible.

            Eg; ADD AX 100H

ADC: Add with carry

            This instruction performs the same operation as ADD instruction. But adds the carry flag bit to the result. All the condition code flags are affected by this instruction.

Eg ADC 0100H

INC: Increment

            This instruction increment the contents of the specified register or memory location by 1. All the condition code flags are affected except the CF. Immediate cannot be operand of this instruction.

Eg: INC AX

       INC [AX]

DEC: Decrement

            The decrement instruction subtracts 1 from the contents of the specified register or memory location by 1. All the condition code flags are affected except the CF. Immediate cannot be operand of this instruction.

Eg: DEC AX

       DEC [5000H]

SUB: Subtract

             The subtract instruction subtracts the source operand from the destination operand and the result is left in the destination operand. Source operand may be a register, memory location, or immediate data and the destination operand may be a register or a memory location. Destination cannot be an immediate operand. All the condition code flags are affected by this instruction.

Eg:  SUB 0100H

        SUB AX, BX

        SUB AX, [3000H]

        SUB [5000H], 0100H

SBB: Subtract with borrow

            The subtract with borrow instruction subtracts the source operand and the borrow flag (CF) which may reflect the result of the previous calculations, from the destination operand. Subtract with borrow, here means subtracting 1 from the subtraction obtained by SUB, if borrow flag is set.

Eg: SBB 0100H

        SBB AX, BX

        SBB AX, [3000H]

        SBB [5000H], 0100H

CMP: Compare

            The cmp instruction is identical to the sub instruction with one crucial difference - it does not store the difference back into the destination operand. The syntax for the cmp instruction is very similar to sub, the generic form is

                cmp     dest, src

The specific forms are

                cmp     reg, reg

                cmp     reg, mem

                cmp     mem, reg

                cmp     reg, immediate data

                cmp     mem, immediate data

                The cmp instruction updates the 80x86's flags according to the result of the subtraction operation (dest - src). You can test the result of the comparison by checking the appropriate flags in the flags register. For details on how this is done, see "The "Set on Condition" Instructions" and "The Conditional Jump Instructions".

Usually you'll want to execute a conditional jump instruction after a cmp instruction. This two step process, comparing two values and setting the flag bits then testing the flag bits with the conditional jump instructions, is a very efficient mechanism for making decisions in a program.

Probably the first place to start when exploring the cmp instruction is to take a look at exactly how the cmp instruction affects the flags. Consider the following cmp instruction:

      cmp         ax, bx

This instruction performs the computation ax-bx and sets the flags depending upon the result of the computation. The flags are set as follows:

Z: The zero flag is set if and only if ax = bx. This is the only time ax-bx produces a zero result. Hence, you can use the zero flag to test for equality or inequality.

S: The sign flag is set to one if the result is negative. At first glance, you might think that this flag would be set if ax is less than bx but this isn't always the case. If ax=7FFFh and bx=-1 (0FFFFh) subtracting ax from bx produces 8000h, which is negative (and so the sign flag will be set). So, for signed comparisons anyway, the sign flag doesn't contain the proper status. For unsigned operands, consider ax=0FFFFh and bx=1. Ax is greater than bx but their

difference is 0FFFEh that is still negative. As it turns out, the sign flag and the overflow flag, taken together, can be used for comparing two signed values.

O: The overflow flag is set after a cmp operation if the difference of ax and bx produced an overflow or underflow. As mentioned above, the sign flag and the overflow flag are both used when performing signed comparisons.

C: The carry flag is set after a cmp operation if subtracting bx from ax requires a borrow. This occurs only when ax is less than bx where ax and bx are both unsigned values.

The cmp instruction also affects the parity and auxiliary carry flags, but you'll rarely test these two flags after a compare operation.

The AAA and DAA Instructions

The aaa (ASCII adjust after addition) and daa (decimal adjust for addition) instructions support BCD arithmetic. The aaa and daa instructions modify the result of a binary addition to correct it for ASCII or decimal arithmetic. For example, to add two BCD values, you would add them as though they were binary numbers and then execute the daa instruction afterwards to correct the results. Likewise, you can use the aaa instruction to adjust the result of an ASCII addition after executing an add instruction. These two instructions assume that the add operands were proper decimal or ASCII values. If we add binary (non-decimal or non-ASCII) values together and try to adjust them with these instructions, we will not produce correct results.

6. Summary

        Today we have discussed the arithmetic instructions. The rest of that including MUL and DIV will be taking in the next class.

7.      Exercise Questions

a)      Choose an instruction that adds a 1 to the contents of SP register?

b)      Select an ADD instruction that will:

i)        add BX to AX

ii) add 12H to AL

iii) addd EDI and EBP

iv) add 22H to CX

v) add the data addressed by SI to AL

c) Explain what the SBB [DI-4], DX instruction accomplishes.                                     

 

Lecture #3

     

1.      Synopsis

·         MUL operation

·         DIV operation

2. Target

      By this lecture, you should be able to answer the following questions

a)      What is the difference between MUL and IMUL instructions?

b)      What is the difference between DIV and IDIV instructions?

c)      Where is the reminder found after an 8- bit division?

 3. Introduction

      The multiply instructions require special treatment and Intel's designers were still short on opcodes, so they designed the multiply instructions to use a single operand. The reg field contains an opcode extension rather than a register value. Of course, multiplication is a two-operand function. The 8086 always assume the accumulator (al, ax, or eax) is the destination operand. This irregularity makes using multiplication on the 8086 a little more difficult than other instructions because one operand has to be in the accumulator.

  4. Revision/Prerequisites

      Please refer to the text Microprocesor architecture of Remesh Gaonkar-Fifth Edition and the pages 1-7 of Advanced microprocessors and peripherals, A K Ray & K M Chaudhari.

5.      Concepts

MUL: Multiplication

            There are two forms of the multiply instruction: an unsigned multiplication (mul) and a signed multiplication (imul). Unlike addition and subtraction, you need separate instructions for these two operations.

The multiply instructions take the following forms:

i) Unsigned Multiplication:

                MUL     reg

                MUL     mem

Eg: MUL BH                          ; (AX) ¬  (AL) ´ (BH)

       MUL CX                          ; (DX)(AX) ¬  (AX) ´(CX)

       MUL WORD PTR [SI]     ; (DX)(AX) ¬  (AX) ´ ([SI])

ii) Signed (Integer) Multiplication:

                IMUL     reg

                IMUL     mem

                IMUL     reg, reg, immediate     (2)

                IMUL     reg, mem, immediate     (2)

                IMUL     reg, immediate          (2)

                IMUL     reg, reg                (3)

                IMUL     reg, mem                (3

Eg:  IMUL     BH

    IMUL CX

    IMUL [SI]

The Division Instructions: DIV, IDIV, and AAD

 DIV: Division

It takes the form

DIV  reg    For unsigned division

DIV  mem

            The div instruction computes an unsigned division. If the operand is an eight-bit operand, div divides the ax register by the operand leaving the quotient in al and the remainder (modulo) in ah. If the operand is a 16-bit quantity, then the div instruction divides the 32-bit quantity in DX: AX by the operand leaving the quotient in ax and the remainder in. With 32 bit operands (on the 80386 and later) div divides the 64-bit value in EDX: EAX by the operand leaving the quotient in EAX and the remainder in EDX.

      IDIV: Signed (Integer) Division

   There is no way to divide by an immediate value. It loads the immediate value into a register or a memory location and do the division through the register or memory location.

            AAD: ASCII Adjust before Division

The aad (ASCII Adjust before Division) instruction is another unpacked decimal operation. It splits apart-unpacked binary coded decimal values before an ASCII division operation. Although this text will not cover BCD arithmetic, the aad instruction is useful for other operations.

6. Summary

Today we have discussed various division operations and multiple operations.

 7. Exercise Questions

            a) When two 8-bit numbers are divided, in which register the dividend found?

b)      Describe the operation of the IMUL BX, DX, 100H instruction?

Lecture #4

 

2.      Synopsis

·         Logical Instructions

·         Branch instructions

·         Unconditional Control Transfer Instructions

2. Target

      By this lecture, you should be able to answer the following questions

a)      Describe the difference between the AND and TEST operations?

b)      What is the difference between NEG and NOT instruction?

c)      What is a short jump?

d)     Contrast the operation JMP DI with JMP [DI].

3.      Introduction

Logical instructions are used for carrying out the bit-by-bit shift, rotate, or basic logical operations. All the condition flags are affected by depending upon the result.

  4. Revision/Prerequisites

      Please refer to the text Microprocessor architecture of Remesh Gaonkar-Fifth Edition and of Advanced microprocessors and peripherals, A K Ray & K M Chaudhari.

5. Concepts

Basic logical operations available with 8086 instruction set are AND, OR, NOT and XOR.

AND: Logical AND

    This instruction bit wise ANDs the source operand involving the accumulator and immediate data, one with any register or memory and immediate data, and one for register-to-register, register to memory and memory to register operations. At least one of the operand should be register or memory operand. Both the operands cannot be immediate or memory. An immediate cannot be a destination operand.

Eg: AND AX, 008H

AND AX,BX

AND AX, [7000H]

AND [7000H], AX

OR: Logical OR

   The OR instruction carries out the OR operation in bit wise. The limitations on source and destination operands are in the same way as that of AND.

Eg:  OR AX, 008H

       ORAX, BX

   OR AX, [7000H]

   OR [7000H], AX

NOT: Logical invert

    The NOT instruction complements or inverts the contents of an operand register or memory location, bi- by- bit.

Eg: NOT AX

NOT [5000H]

XOR: Logical Exclusive OR

   The XOR operation is again carried our in the similar way to the AND and OR operation. The XOR operation gives a high output when the two input bits are dissimilar. Otherwise, the output is zero.

Eg: XOR AX, [5000H]

       XOR AX, 0009H

      XOR AX, BX

          NEG : Negate

The neg (negate) instruction takes the two's complement of a byte or word. It takes a single (destination) operation and negates it. The syntax for this instruction is

                               neg          dest

It computes the following:

                               dest := 0 - dest

This effectively reverses the sign of the destination operand.

If the operand is zero, its sign does not change, although this clears the carry flag. Negating any other value sets the carry flag. Negating a byte containing -128, a word containing -32,768, or a double word containing -2,147,483,648 does not change the operand, but will set the overflow flag. Neg always updates the A, S, P, and Z flags as though you were using the sub instruction.

The allowable forms are:

                neg     reg

                        neg     mem

Eg:  J := - J          neg     J

       J := -K          mov     ax, K

                             neg     ax

                            mov     J, ax

Branch instructions (Control Transfer)

       The Control Transfer instructions transfer the flow of execution of a program to a new address specified in the instruction directly or indirectly. The CS and IP registers are loaded with the new value corresponding to the new location that the execution is transferred. And it can be classified into two types:

i)        Conditional Control Transfer Instructions

        ii) Unconditional Control Transfer Instructions

    Unconditional Control Transfer Instructions

                JMP, CALL, RET, INT and IRET instructions transfer control from one code segment location to another. These locations can be within the same code segment (near control transfers) or in different code segments (far control transfers). Here, the execution control is transferred to the specified location independent of any status or condition. The CS and IP unconditionally modified to the new CS and IP.

1.       JMP

       JMP (Jump) unconditionally transfers control to the target location. JMP is a one-way transfer of execution; it does not save a return address on the stack.

The JMP instruction always performs the same basic function of transferring control from the current location to a new location. Its implementation varies depending on whether the address is specified directly within the instruction or indirectly through a register or memory.

Near Jump: A jump to an instruction within the current code segment (the segment currently pointed to by the CS register), sometimes referred to as an intrasegment jump

Short Jump: A near jump where the jump range is limited to –128 to +127 from the current EIP value.

Far Jump: A jump to an instruction located in a different segment than the current code segment but at the same privilege level, sometimes referred to as an intersegment jump.

Near and Short Jumps. When executing a near jump, the processor jumps to the address (within the current code segment) that is specified with the target operand. The target operand specifies either an absolute offset (that is an offset from the base of the code segment) or a relative offset (a signed displacement relative to the current value of the instruction pointer in the EIP register). A near jump to a relative offset of 8-bits (rel8) is referred to as a short jump. The CS register is not changed on near and short jumps.
An absolute offset is specified indirectly in a general-purpose register or a memory location (r/m16 or r/m32). The operand-size attribute determines the size of the target operand (16 or 32 bits). Absolute offsets are loaded directly into the EIP register. If the operand-size attribute is 16, the upper two bytes of the EIP register are cleared to 0s, resulting in a maximum instruction pointer size of 16 bits.
A relative offset (rel8, rel 16, or rel32) is generally specified as a label in assembly code, but at the machine code level, it is encoded as a signed 8-, 16-, or 32-bit immediate value. This value is added to the value in the EIP register. (Here, the EIP register contains the address of the instruction following the JMP instruction). When using relative offsets, the opcode (for short vs. near jumps) and the operand-size attribute (for near relative jumps) determines the size of the target operand (8, 16, or 32 bits).

A direct JMP instruction includes the destination address as part of the instruction. An indirect JMP instruction obtains the destination address indirectly through a register or a pointer variable.

Direct near JMP:

 A direct JMP uses a relative displacement value contained in the instruction. The displacement is signed and the size of the displacement may be a byte, word, or doubleword. The processor forms an effective address by adding this relative displacement to the address contained in EIP. When the additions have been performed, EIP refers to the next instruction to be executed.

Indirect near JMP:

 Indirect JMP instructions specify an absolute address in one of several ways:

  1.  The program can JMP to a location specified by a general register

      (Any of EAX, EDX, ECX, EBX, EBP, ESI, or EDI). The processor moves

      this 32-bit value into EIP and resumes execution.

  2.  The processor can obtain the destination address from a memory

      operand specified in the instruction.

  3.  A register can modify the address of the memory pointer to select a

      destination address.

2.       CALL

          CALL (Call Procedure) activates an out-of-line procedure, saving on the stack the address of the instruction following the CALL for later use by a RET (Return) instruction. CALL places the current value of EIP on the stack. The RET instruction in the called procedure uses this address to transfer control back to the calling program.

CALL instructions, like JMP instructions have relative, direct, and indirect versions.

Indirect CALL instructions specify an absolute address in one of these ways:

  1.  The program can CALL a location specified by a general register (any

      of EAX, EDX, ECX, EBX, EBP, ESI, or EDI). The processor moves this

      32-bit value into EIP.

  2.  The processor can obtain the destination address from a memory

      operand specified in the instruction. 

3.       RET and IRET

      RET (Return From Procedure) terminates the execution of a procedure and transfers control through a back-link on the stack to the program that originally invoked the procedure. RET restores the value of EIP that was saved on the stack by the previous CALL instruction.

RET instructions may optionally specify an immediate operand. By adding this constant to the new top-of-stack pointer, RET effectively removes any arguments that the calling program pushed on the stack before the execution of the CALL instruction.

IRET (Return From Interrupt) returns control to an interrupted procedure. IRET differs from RET in that it also pops the flags from the stack into the flags register. The flags are stored on the stack by the interrupt mechanism.

6. Summary

Today we have discussed Logical and branch instructions. We also have seen the unconditional branch instructions. Tomorrow we will discuss the rest of branch instructions and string manipulation instructions.

 7. Exercise Questions

a)      How does the near RET instruction works?

b)      Which jump instructions used when jumping to any location within the current code segment?

c)      Which JMP instruction is five bytes long?

Lecture #5

 

1.      Synopsis

·         Conditional Control Transfer Instructions

·         String Manipulation instructions

2. Target

      By this lecture, you should be able to answer the following questions

a)      When will the JO instruction jump?

b) Describe how JA instruction operates?

3. Introduction

            The conditional transfer instructions are jumps that may or may not transfer control, depending on the state of the CPU flags when the instruction executes. .

  4. Revision/Prerequisites

      Please refer to the text Microprocessor architecture of Remesh Gaonkar-Fifth Edition and of Advanced microprocessors and peripherals, A K Ray & K M Chaudhari.

5. Concepts

Conditional Jump Instructions

Table shows the conditional transfer mnemonics and their interpretations. The conditional jumps that are listed as pairs are actually the same instruction. The assembler provides the alternate mnemonics for greater clarity within a program listing.

Interpretation of Conditional Transfers

Unsigned Conditional Transfers

Mnemonic         Condition Tested          "Jump If..."

JA/JNBE           (CF or ZF) = 0           above/not below nor equal

JAE/JNB           CF = 0                       above or equal/not below

JB/JNAE           CF = 1                       below/not above nor equal

JBE/JNA           (CF or ZF) = 1           below or equal/not above

JC                      CF = 1                       carry

JE/JZ                 ZF = 1                        equal/zero

JNC                  CF = 0                        not carry

JNE/JNZ           ZF = 0                        not equal/not zero

JNP/JPO           PF = 0                        not parity/parity odd

JP/JPE              PF = 1                        parity/parity even

Signed Conditional Transfers

Mnemonic         Condition Tested             "Jump If..."

JG/JNLE          ((SF xor OF) or ZF) = 0   greater/not less nor equal

JGE/JNL          (SF xor OF) = 0                greater or equal/not less

JL/JNGE          (SF xor OF) = 1                less/not greater nor equal

JLE/JNG          ((SF xor OF) or ZF) = 1   less or equal/not greater

JNO                  OF = 0                              not overflow

JNS                   SF = 0                               not sign (positive, including 0)

JO                     OF = 1                              overflow

JS                      SF = 1                               sign (negative)

Conditional jump instructions contain a displacement, which is added to, the EIP register if the condition is true. The displacement may be a byte, a word, or a doubleword. The displacement is signed; therefore, it can be used to jump forward or backward.

            String Manipulation instructions

        CMPS - Compare String (Byte, Word or Doubleword)

        Usage:  CMPS    dest,src

                CMPSB

                CMPSW

                CMPSD   (386+)

        Modifies flags: AF CF OF PF SF ZF

        Subtracts destination value from source without saving results. Updates flags based on the subtraction and the index registers (E)SI and (E)DI are incremented or decremented depending on the state of the Direction Flag.  CMPSB inc/decrements the index registers by 1, CMPSW inc/decrements by 2, while CMPSD increments or decrements by 4.  

REP - Repeat String Operation

        Usage:  REP

        Modifies flags: None

        Repeats execution of string instructions while CX != 0.  After each string operation, CX is decremented and the Zero Flag is tested.  The combination of a repeat prefix and a segment override        on CPU's before the 386 may result in errors if an interrupt occurs before CX=0.  The following code shows code that is susceptible to this and how to avoid it:

               MOVS - Move String (Byte or Word)

        Usage:  MOVS    dest,src

                MOVSB

                MOVSW

                MOVSD  

        Modifies flags: None

        Copies data from addressed by DS:SI (even if operands are given) to the location ES:DI destination and updates SI and DI based on the size of the operand or instruction used.  SI and DI are incremented when the Direction Flag is cleared and decremented when the Direction Flag is Set.  Use with REP prefixes.

SCAS - Scan String  (Byte, Word or Doubleword)

        Usage:  SCAS    string

                SCASB

                SCASW

                SCASD   (386+)

        Modifies flags: AF CF OF PF SF ZF

        Compares value at ES:DI (even if operand is specified) from the accumulator and sets the flags similar to a subtraction.  DI is incremented/decremented based on the instruction format (or        operand size) and the state of the Direction Flag.  

STOS - Store String  (Byte, Word or Doubleword)

       Usage:  STOS    dest

                STOSB

                STOSW

                STOSD

        Modifies flags: None

        Stores value in accumulator to location at ES:(E)DI (even if operand  is given).  (E)DI is incremented/decremented based on the size of the operand (or instruction format) and the state of the Direction Flag. Use with REP prefixes.

LODS - Load String (Byte, Word or Double)

        Usage:  LODS    src

                LODSB

                LODSW

                LODSD  

        Modifies flags: None

        Transfers string element addressed by DS:SI (even if an operand is supplied) to the accumulator.     SI is incremented based on the size of the operand or based on the instruction used.  If the Direction Flag is set SI is decremented, if the Direction Flag is clear SI is incremented. Use with REP prefixes.

6. Summary

Today we have discussed various String operations and conditional branch instructions. Tomorrow we will go through programming techniques and 80286 advanced characteristics.

6.      Exercise Questions

1. Differentiate between CMPS and CMPW.

Lecture #6

 

1.      Synopsis

·         Simple programs

·         Assembly language programming

 

2. Target

      By this lecture, you should be able to answer the following questions

a)      What is an assembly language program?

b)      What is mean by protected mode?

3. Introduction

           An assembly language is a low-level language used in the writing of computer programs. Assembly language uses mnemonics, abbreviations or words that make it easier to remember a complex instruction and make programming in assembler an easier task. The goal of using mnemonics in the writing of assembly language programs is to replace the more error prone, and time consuming, effort of directly programming in a target computer's numeric machine code that had been used with the very first computers.

  4. Revision/Prerequisites

      Please refer to the text Microprocessor architecture of Remesh Gaonkar-Fifth Edition and of Advanced microprocessors and peripherals, A K Ray & K M Chaudhari.

2. Concepts

Assembly language

A program written in assembly language consists of a series of instructions mnemonics that correspond to a stream of executable instructions, when translated by an assembler, which can be loaded into memory and executed.

Assembly Language program

             An assembly language program is translated into the target computer's machine code by a utility program called an assembler. An assembler is distinct from a compiler, in that it generally performs one-to-one translations from mnemonic statements into machine instructions. Translators that take an entire program and translate it as a body are called compilers. Translators that take one line at a time are called interpreters. Translators that translate assembly language programs into machine language are called assemblers.

Sample Programs

Ex1: Write a program to add a data byte located at offset 0555H in 5000H segment to another data byte available at 0600H in the same segment and store the result at 0700H in the same segment.

Solution:

         MOV AX, 5000H

MOV DS, AX

         MOV AX, [555H]

         ADD AX, [600H]

         MOV [700H], AX

HLT

Ex: 2: Write a program to move the contents of the memory location 0500H to register BX and also to CX. Add immediate byte 05H to the data residing in memory location, whose address computed using DS= 2000H and offset=0600H. Store the result of the addition in 0700H. Assume that the data is located in the segment specified by the data segment register D which contain 2000H.

Solution:

         MOV AX, 2000H

MOV DS, AX

         MOV BX, [O500H]

         MOV CX, BX

MOV [O600H], 05H

         MOV DX, [0600H]

         MOV [0700H], DX

         HLT

80286 characteristics

The 80286 introduced in response to competition from manufacturers who were cloning the IMB PC. The connections between the various parts of the motherboard became 16-bit throughout, thus increasing efficiency 4 times. It also has 24 memory address lines, so it could talk to 16Mb of physical memory. However, DOS could not use it since it had to be addressed in protected mode. DOS can only run in real mode, which is restricted to the 1 Mb that can be seen by the 8088. Therefore, a Pentium running DOS is just a fast XT. Just as the 8088, the 80286 CPU is limited to 1MB (+ 64KB) when running in real mode. The 80286 CPU has to run in protected mode to access extended memory. On an 80286 system, DOS' extended memory manager uses BIOS service INT 15h/AH=87h to move data from/to extended memory. INT 15h enters and leaves protected mode.

6. Summary

Today we have discussed assembly language programming and programming mode. We also studied the programming through 8086 processor.

 7. Exercise Questions

1.      The assembler converts a source file to a(n) ------------ file.

2.      The linker program links object files and ---------- files to create an execution file.

3.      What is the size of memory that can be accessed in protected mode?

8. Programming/Computational Assignments

1.      Add the contents of the memory location 5000H: 0800H to the contents of 3000: 0070H and store the result in 8000: 0900H.

2.      Move a byte string, 16 bytes long, from the offset 0200H to 0500H in the segment 6000H.

Lecture #7

 

1.      Synopsis

·         IBM PC Assembly language programming

·         Program Development Tools – DEBUG, MASM, TASM, etc.

 

2. Target

      By this lecture, you should be able to answer the following questions

a)      What are the different assembly language programming tools?

b)      What is mean by protected mode?

3. Introduction

           An assembly language is a low-level language used in the writing of computer programs. Assembly language uses mnemonics, abbreviations or words that make it easier to remember a complex instruction and make programming in assembler an easier task. The goal of using mnemonics in the writing of assembly language programs is to replace the more error prone, and time consuming, effort of directly programming in a target computer's numeric machine code that had been used with the very first computers.

 4. Revision/Prerequisites

      Please refer to the text Microprocessor architecture of Remesh Gaonkar-Fifth Edition and of Advanced microprocessors and peripherals, A K Ray & K M Chaudhari.

4.      Concepts

DEBUG

DEBUG is a command in DOS, MS-DOS, and Microsoft Windows which runs the program DEBUG.EXE .Debug can act as an assembler, disassembler, or hex dump program allowing users to interactively examine memory contents, make changes, and selectively execute COM, EXE and other file types. It also has several subcommands which are used to access specific disk sectors, I/O ports and memory addresses. Old MS-DOS DEBUG runs at a 16-bit process level and therefore it is limited to older programs, FreeDOS DEBUG has a "DEBUGX" version supporting 32-bit DPMI programs as well.

Syntax

debug [[Drive:][Path] FileName [parameters]]

When debug is started without any parameters the debug prompt, a "-", appears. The user can then enter one of several one or two-letter subcommands, including "a" to enter the assembler mode, "d" to perform a hexadecimal dump, "t" to trace and "u" to unassemble (disassemble) a program in memory.^[4] Debug can also be used as a "debug script" interpreter using the following

syntax:

debug < FileName

MASM

The Microsoft Macro Assembler (abbreviated MASM) is an assembler for the x86 family of microprocessors. It was originally produced by Microsoft for development work on their MS-DOS operating system, and was for some time the most popular assembler available for that operating system. It supported a wide variety of macro facilities and structured programming idioms, including high-level constructions for looping, procedure calls and alternation (therefore, MASM is an example of a high-level assembler).

Later versions added the capability of producing programs for the Windows operating systems that were released to follow on from MS-DOS. MASM is one of the few Microsoft development tools (another was NMAKE) for which one version targets both 16-bit and 32-bit. Early version were MS-DOS applications. Later versions also were OS/2 applications

TASM

The Turbo Assembler (TASM) mainly PC-targeted assembler package was Borland's offering in the x86 assembler programming tool market. As one would expect, TASM worked well with Borland's high-level language compilers for the PC, such as Turbo C, Turbo Pascal and Turbo Basic. Along with the rest of the Turbo suite, Turbo Assembler is no longer maintained.

The Turbo Assembler package came bundled with the linker Turbo Linker, and was interoperable with the Turbo Debugger debugger. For compatibility with the common Microsoft Macro Assembler (MASM), TASM was able to assemble such source code files via its MASM mode. It also had an ideal mode that enabled a few enhancements.

TASM 3.0 supports high-level features such as objects so it enables object-oriented programming.

6. Summary

Here is the end of this module and we have discussed various programming development tools- DEBUG, MASM, TASM.

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